PMC-Sierra, Inc.
TELECOM STANDARD PRODUCT
PMC-920314
ISSUE 2
PM4541 T1XC-EVBD
T1XC EVALUATION DAUGHTERBOARD
2.7
T1XC Devices
Up to two T1XC devices can be placed on the daughterboard at a time. Each
device runs independent of the other, except when explicit connections are made
through the header strips (i.e. when configured as a jitter attenuating format
converter or "CSU"). All internal registers are individually accessible and each
device has been set up with individual receiver, transmitter and backplane access
through headers and connectors. A full description of the T1XC device is beyond
the scope of this document. For more information, refer to the PM4341 T1XC
datasheet.
2.8
"CSU" Connection Blocks
While the main purpose of the evaluation daughterboard is to provide unrestricted
access to all of the features of the T1XC device, one application is conveniently
provided which allows easy evaluation of most of the features of the device. By
plugging in shorting jumpers into the two 16 pin CSU DIP sockets (U5 and U6) on
the daughterboard, the two T1XCs are connected back to back to implement a jitter-
attenuating format converter (a function often implemented within a CSU) as
described in the T1XC datasheet. These CSU DIP socket jumpers make almost all
of the necessary connections except for the signals BRCLK, BRFPI, and BTCLK.
Connections for these signals are made through E-W and W-E jumper blocks J19,
J20, J21, J22, J23, and J24. By installing jumper connections between pin 1 and
pin 2 of jumper blocks J19 and J20, between pin 3 and pin 4 of each of jumper
blocks J21, J22, J23, J24, and between pin 2 and 3 of jumper block J30, a "CSU"
like application can be implemented where the 1.544 MHz clock for the backplane
between the two T1XC devices is provided by the MT8940, which in turn is locked to
the recovered clock provided by T1XC #1. Variations of this application can be
explored by using the other options provided on the jumper blocks. With this
application, and with its variations, different backplane rates can be tested.
Connections are provided for 1.544 MHz, 2.048 MHz, and externally supplied
backplane clock rates.
4
PMC [ PMC-SIERRA, INC ]
