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PM4541 参数 Datasheet PDF下载

PM4541图片预览
型号: PM4541
PDF下载: 下载PDF文件 查看货源
内容描述: T1XC评估子板 [T1XC EVALUATION DAUGHTER BOARD]
分类和应用:
文件页数/大小: 46 页 / 516 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PM4541T1XC-EVBD  
TELECOM STANDARD PRODUCT  
PMC-920314  
ISSUE 2  
T1XC EVALUATION DAUGHTERBOARD  
C4MB  
C16M  
O
O
J29-9  
Inverted C4M clock.  
J29-10 Direct access to 16.388 MHz clock driving the  
MT8940.This pin is mainly provided for direct  
oscillator access. If the MT8940 is not used the  
16.388 MHz clock can be replaced by a 2.048 MHz  
clock with access to the clock signal provided by  
this pin.  
C12M  
GND  
O
G
J29-11 Direct access to 12.355 MHz clock driving the  
MT8940.This pin is mainly provided for direct  
oscillator access. If the MT8940 is not used the  
12.355 MHz clock can be replaced by a 1.544 MHz  
clock with access to the clock signal provided by  
this pin.  
J29-12 MT8940 DPLL header ground reference.  
3.2.3 T1XC Headers  
A number of headers are provided which give direct access to the main functional  
pins on the T1XCs. Both devices on the daughterboard have the same pins brought  
out to headers and every effort has been made to insure that all headers are  
symmetrical with both devices. The T1XCs are uniquely identified by an east/west  
designation. The following table gives a brief description of the T1XC signals. For a  
more detailed description of the T1XC device, refer to the T1XC datasheet.  
Signal  
TAP  
TAN  
RAS  
REF  
Type Ref (E)  
Ref (W) Description  
O
O
I
J9-1  
J9-2  
J9-3  
J10-1  
J10-2  
J10-3  
J10-4  
J10-5  
J16-1  
J16-2  
J16-3  
Transmit Analog Positive Pulse  
Transmit Analog Negative Pulse  
Receive Analog Signal  
Receive Reference  
T1XC Analog Ground Reference  
Transmit Clock Input  
I/O J9-4  
GND  
G
I
O
O
J9-5  
TCLKI  
TCLKO  
TDP/TDD  
J15-1  
J15-2  
J15-3  
Transmit Clock Output  
Transmit Digital Positive Line Pulse/  
Transmit Digital DS-1 Signal  
Transmit Digital Negative Line Pulse/  
Transmit FIFO Flag  
TDN/TFLG  
O
O
J15-4  
J15-5  
J16-4  
J16-5  
J16-6  
TDLCLK/  
TDLUDR  
TDLSIG/  
TDLINT  
Transmit Data Link Clock/ Transmit Data  
Link Underrun  
I/O J15-6  
Transmit Data Link Signal/ Transmit Data  
Link Interrupt  
9
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