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PM4351-RI 参数 Datasheet PDF下载

PM4351-RI图片预览
型号: PM4351-RI
PDF下载: 下载PDF文件 查看货源
内容描述: 联合E1 / T1收发器 [COMBINED E1/T1 TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 485 页 / 3011 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4351 COMET  
DATA SHEET  
PMC-1970624  
ISSUE 10  
COMBINED E1/T1 TRANSCEIVER  
When the elastic store is being used, if the average frequency of the backplane  
data is greater than the average frequency of the line clock, the buffer will fill.  
Under this condition a controlled slip will occur upon the next frame boundary.  
The following frame of PCM data will be deleted.  
If the average frequency of the backplane data is less than the average  
frequency of the line clock, the buffer empty. Under this condition a controlled  
slip will occur upon the next frame boundary. The latest frame will be repeated.  
A slip operation is always performed on a frame boundary. The TX-ELST is  
upstream of the frame overhead insertion; therefore, frame slips do not corrupt  
the frame alignment signal.  
When the line timing is derived from BTCLK or BTCLK is an output, the elastic  
store is bypassed to eliminate the two frame delay.  
9.19 Transmit Per-Channel Serial Controller (TPSC)  
The Transmit Per-channel Serial Controller allows data and signaling trunk  
conditioning or idle code to be applied on the transmit DS-1 stream on a per-  
channel basis. It also allows per-channel control of zero code suppression, data  
inversion, and application of digital milliwatt.  
The Transmit Per-channel Serial Controller function is provided by a Per-  
Channel Serial Controller (PCSC) block. The PCSC is a general purpose triple  
serializer. Data is sourced from three banks of thirty-two 8-bit registers, with  
each bank supporting a single serial output.  
The TPSC interfaces directly to the E1-TRAN and T1-XBAS blocks to provide  
serial streams for signaling control, idle code data and PCM data control.  
The registers are accessible from the µP interface in an indirect address mode.  
The BUSY indication signal can be polled from an internal status register to  
check for completion of the current operation.  
9.20 T1 Inband Loopback Code Generator (XIBC)  
The T1 Inband Loopback Code Generator (XIBC) block generates a stream of  
inband loopback codes (IBC) to be inserted into a T1 data stream. The IBC  
stream consists of continuous repetitions of a specific code and can be either  
framed or unframed. When the XIBC is enabled to generate framed IBC, the  
framing bit overwrites the inband code pattern. The contents of the code and its  
length are programmable from 3 to 8 bits. The XIBC interfaces directly to the  
XBAS Basic Transmitter block.  
PROPRIETARY AND CONFIDENTIAL  
54  
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