STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
Table 2
- Backplane Receive Interface (4 pins)
Pin Name
Type
Pin No.
-RI -NI
54 D8
Function
BRCLK
I/O
Backplane Receive Clock (BRCLK). When BRCLK is configured as an input
and the elastic store is enabled, BRCLK may be either a 1.544 MHz,
2.048 MHz, 3.088 MHz, 4.096 MHz, 8.192 MHz or 16.384 MHz clock with
optional gapping for adaptation to non-uniform backplane data streams.
When BRCLK is configured as a output, it can be either a 1.544 MHz or
2.048 MHz clock derived from the recovered line rate timing (available on
RSYNC), with optional jitter attenuation. In T1 NxDS0 mode, BRCLK is
gapped during the framing bit position and optionally for between 1 and 23 DS0
channels in the backplane data stream. In E1 NxDS0 mode, BRCLK is gapped
optionally for between 1 and 31 time slots in the backplane data stream.
Either the rising or falling edge of BRCLK may be configured as the active
edge. BRPCM and BRSIG are updated on the active edge of BRCLK. When
BRFP is configured as an input, it is sampled on the active edge of BRCLK.
When BRFP is configured as an output, it is updated on the active edge of
BRCLK.
After a reset, BRCLK is configured as an input.
PROPRIETARY AND CONFIDENTIAL
21
PMC [ PMC-SIERRA, INC ]
