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PM4351-NI 参数 Datasheet PDF下载

PM4351-NI图片预览
型号: PM4351-NI
PDF下载: 下载PDF文件 查看货源
内容描述: 联合E1 / T1收发器 [COMBINED E1/T1 TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 485 页 / 3011 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4351 COMET  
DATA SHEET  
PMC-1970624  
ISSUE 10  
COMBINED E1/T1 TRANSCEIVER  
Register 041H: BTIF Frame Pulse Configuration  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
R/W  
MAP  
Unused  
Unused  
Unused  
FPINV  
0
X
X
X
0
0
0
1
R/W  
R/W  
R/W  
R/W  
ESF_EN  
FPTYP  
FPMODE  
MAP:  
The MAP bit determines the mapping of a 2.048 MHz backplane onto a  
1.544 MHz line. This bit is ignored when in E1 mode (E1/T1B register bit is  
logic 1), when the backplane rate is 1.544 Mbit/s (RATE[1:0] = 'b00), or when  
in clock master mode (CMODE = 'b0).  
When MAP is a logic 0, every fourth time slot is unused, starting with time slot  
0. The framing bit is sampled during bit 0 of time slot 0, so that only bits 1 to  
7 of time slot 0 are ignored.  
When MAP is a logic 1, the first 24 time slots (0 to 23) are sampled. The  
framing bit is sampled during bit 7 of time slot 31 and the rest of the frame  
(time slots 24 to 30 and bits 0 to 6 of time slot 31) are ignored.  
FPINV:  
The frame pulse inversion (FPINV) bit determines whether BTFP is inverted  
prior to sampling. If FPINV is a logic 0, BTFP is active high. If FPINV is a  
logic 1, BTFP is active low. Frame pulse inversion cannot be used when  
BTFP is configured as an output (FPMODE is a logic 0).  
ESF_EN:  
The extended superframe enable (ESF_EN) bit determines which superframe  
alignment is used when in T1 mode and FPTYP is a logic 1. When ESF_EN  
is a logic 0, superframe alignment is chosen and BTFP pulses (FPMODE  
logic 0) or is expected (FPMODE logic 1) every 12 frames. When ESF_EN is  
a logic 1, extended superframe alignment is chosen and pulses (FPMODE  
logic 0) or is expected (FPMODE logic 1) every 24 frames.  
PROPRIETARY AND CONFIDENTIAL  
159