STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
Register 001H: Clock Monitor
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
XCLKA
X
X
X
X
X
X
X
X
R
R
R
R
R
BTCLKA
TCLKIA
BRCLKA
RCLKIA
When a monitored clock signal makes a low to high transition, the corresponding
register bit is set high. The bit will remain high until this register is read, at which
point all the bits in this register are cleared. A lack of transitions is indicated by
the corresponding register bit reading low. This register should be read at
periodic intervals to detect clock failures.
BTCLKA:
The BTCLK active (BTCLKA) bit detects low to high transitions on the BTCLK
input. BTCLKA is set high on a rising edge of BTCLK, and is set low when
this register is read.
TCLKIA:
The TCLKI active (TCLKIA) bit detects low to high transitions on the TCLKI
input. TCLKIA is set high on a rising edge of TCLKI, and is set low when this
register is read.
BRCLKA:
The BRCLK active (BRCLKA) bit detects low to high transitions on the
BRCLK input. BRCLKA is set high on a rising edge of BRCLK, and is set low
when this register is read.
RCLKIA:
The RCLKI active (RCLKA) bit detects low to high transitions on the RCLKI
input. RCLKIA is set high on a rising edge of RCLKI, and is set low when this
register is read.
PROPRIETARY AND CONFIDENTIAL
78
PMC [ PMC-SIERRA, INC ]
