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PM4341A 参数 Datasheet PDF下载

PM4341A图片预览
型号: PM4341A
PDF下载: 下载PDF文件 查看货源
内容描述: T1收发器 [T1 TRANSCEIVER]
分类和应用:
文件页数/大小: 2 页 / 45 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM4341A的Datasheet PDF文件第2页  
PM4341A
Summary Information
T1 TRANSCEIVER
FEATURES
• Monolithic single chip device which
integrates a full featured T1 framer
with an on-chip analog line interface.
• Supports SF, ESF, T1DM (DDS) and
SLC®96 format DS1 signals.
Supports unframed mode. Supports
B8ZS or AMI line codes.
• Recovers clock and data from the
incoming DSX-1 signal, generates
DSX-1 output signal.
• Supports transfer of PCM and
signalling to/from 1.544 Mbit/s and
2.048 Mbit/s backplane buses.
Supports gapped data streams used
in higher rate multiplexing.
• Provides robbed bit signalling
insertion/extraction, idle code
substitution, digital milliwatt code
substitution, data inversion and 2
superframes of signalling debounce
on a per channel basis.
• Pin compatible with the PM6341
E1XC E1 Transceiver.
• Software compatible with the
PM4344 TQUAD Quad T1 Framer
and PM4388 TOCTL Octal T1
Framer.
• Provides an 8-bit microprocessor bus
interface for configuration, control
and status monitoring.
• Low-power 5V CMOS technology.
• Avalable in a high density 80-pin (14
by14mm) PQFP or in a 68-pin PLCC
package.
T
1XC
RECEIVE SECTION
• Provides loss of signal, red alarm,
yellow alarm and AIS alarm
indication. Detects violations of the
ANSI T1.403 12.5% pulse density
rule over a moving 192 bit window.
• Supports line and path performance
monitoring per Bellcore, AT&T and
ANSI recommendations.
• Accumulators are provided for ESF
CRC-6 and framing bit errors, Line
Code Violations and Loss Of Frame
or Change Of Frame Alignment
events.
• Extracts the data link in ESF, T1DM
and SLC®96 formats. Extracts the
D-channel for primary rate interfaces.
• Provides ESF bit-oriented code
detection and an HDLC interface for
terminating the ESF datalink.
• Provides a 2 frame elastic store for
jitter and wander attenuation.
• Detects programmable in-band
loopback codes.
TRANSMIT SECTION
• Provides per channel minimum ones
density through Bell (Bit 7), GTE or
DDS zero code suppression.
• Detects violations of the ANSI T1.403
12.5% pulse density rule over a
moving 192 bit window.
• Inserts the data link in ESF, T1DM
and SLC®96 formats. Inserts the D-
channel for primary rate interfaces.
• Generates AIS and yellow alarm in
all formats.
• Inserts the data link in ESF, T1DM
and SLC®96 formats. Inserts the D-
channel for primary rate interfaces.
• Generates ESF bit-oriented codes
and provides an HDLC interface for
generating the ESF datalink.
• Inserts programmable in-band
loopback codes.
• Provides a FIFO buffer for jitter
attenuation and rate conversion.
BLOCK DIAGRAM
TCLK I
TR A NS M ITT E R
BT PCM /BTD P
BTSIG/B TDN
BT FP
BTCL K
BT IF
BACK-
PLA NE
TRANS M IT
INTER-
FAC E
XB AS
BASICT RANS M IT TER :
FRAM E GENERA TION ,
ALARM INS E RT ION ,
TRUN K CON DITIO NING
LINE CO DING
TO P S
TIM ING OP TIONS
DJ AT
DIG ITAL JIT TER
ATTE NU ATO R
XPLS
ANALO G DS X-1
PULS E
GE NE RATOR
TA P
TA N
TPSC
PER-C HA N
CO NT :
SIG ,IDL E,
ZE RO CONT
X IB C
IN-BA ND
LO OP BACK
CO DE
GE NE RATOR
TC
A(7-0)
RD B
WRB
CS B
M P IF
M ICRO -
PROCE SS-
OR
INT ERFACE
XBO C
BIT -
ORIENTED
CO DE GEN .
APPLICATIONS
• T1 & T3 Multiplexers
• T1 Frame Relay Interfaces
• T1 ATM UNI Interfaces
• Fractional T1
• T1 Channel Service Units (CSUs)
and Data Service Units (DSUs)
• Digital Access and Cross-Connect
Systems (DACS) and Electronic
Digital Cross-Connects (EDSX)
• Digital Loop Carriers (DLCs)
• SONET Add-Drop Multiplexers
(ADM)
• ISDN Primary Rate Interfaces (PRI)
• Digital Private Branch Exchanges
(PBX)
• T1 & T3 Test Equipment
SLC®96 is a registered trademark of AT&T
XPD E
PULSE
DE N SIT Y
ENFOR CE R
DT IF
DIG IT AL DS -1
TRANSM IT
INT ERF ACE
TCL KO
TDP/T DD
TDN/T FLG
ALE
INT B
RS T B
X F DL
HDLC
TRANS -
M ITT E R
TDLCLK /
TDL UD R
TDLSIG/
TDLINT
D(7-0)
BRCLK
RE CE IV E R
BRF PI
XCLK /VCLK
PMO N
PER-
FOR M ANCE
M ONIT OR
CO UNT E RS
E LS T
ELAST IC
ST ORE
S IG X
SIG NA LLING
EXTR ACT-
OR
RA S
RE F
R RC
RS L C
ANA LO G
DS X-1 PULSE
SLICER
BRPCM /BR DP
BR IF
BA CK-
PLAN E
RE CE IV E
INTER-
FA CE
BRSIG /B RD N
BRFPO
RC L K I
RD P/RDD /
SD P
RD N/RL CV /
S DN
DR IF
DIG ITAL
DS -1 RX
INTER-
FAC E
CDRC
CL O CK AND
DA T A
RE CO VERY
FR M R
F RAM ER:
FRA M E
ALIGNM ENT ,
ALARM
EXT RA CT
FR A M
FRA M ER/
SLIP BUFFE R
R AM
RPSC
PER -CHANN EL
CON TROL:
TRUNK
CO ND ITION
RDP CM /RPC M
RCLK O
RF P
IB C D
IN-BAND
LO OP BACK
CO DE
DE TE CTO R
PDVD
PULS E
DE NS ITY
VIO LATION
DE TEC TOR
AL M I
ALARM
INT E-
GR ATOR
RB O C
BIT -
ORIENTED
CO D E
DE TECTO R
RF D L
HDLC
RE CE IV ER
RD LS IG/
RD LINT
RD LCLK/
RD LEO M
PMC-920108(R7)
© 1998 PMC-Sierra, Inc. March, 1998