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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
Figure 9: DJAT Jitter Tolerance E1 Modes  
The accuracy of the XCLK frequency and that of the reference clock used to  
generate the jitter attenuated clock have an effect on the minimum jitter  
tolerance. Given that the DJAT PLL reference clock accuracy can be ±200 Hz  
from 1.544 MHz or be ±103 Hz from 2.048 MHz, and that the XCLK input  
accuracy can be ±100 ppm from 37.056 MHz or ±100 ppm from 49.152 MHz, the  
minimum jitter tolerance for various differences between the frequency of PLL  
reference clock and XCLK ÷ 24 are shown in Figure 10 and Figure 11.  
An XCLK input accuracy of ±100 ppm is only acceptable if an accurate line rate  
reference is provided. If TJAT is left to free-run without a reference, or  
referenced to a derivative of XCLK, then XCLK accuracy must be ±32 ppm.  
PROPRIETARY AND CONFIDENTIAL  
74  
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