STANDARD PRODUCT
PM4328 TECT3
DATASHEET
PMC-2011596
ISSUE 1
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
NOTES ON PIN DESCRIPTIONS:
1. All TECT3 inputs and bi-directionals present minimum capacitive loading and
operate at TTL logic levels.
2. All TECT3 outputs and bi-directionals have at least 2 mA drive capability. The
bidirectional data bus outputs, D[7:0], have 4 mA drive capability. The outputs
TCLK, TPOS/TDAT, TNEG/TMFP, RGAPCLK/RSCLK, RDATAO,
RFPO/RMFPO, ROVRHD, TFPO/TMFPO/TGAPCLK, SBIACT, RECVCLK1,
RECVCLK2, MVID[7:0], CASID[7:0], CCSID and INTB have 4 mA drive
capability. The SBI outputs , SDDATA[7:0], SDDP, SDPL, SDV5, and
SAJUST_REQ, have 8 mA drive capability. The bidirectional SBI signal
SC1FP has 8 mA drive capability.
3. IOL = -2mA for others.
4. Inputs RSTB, ALE, TMS, TDI, TRSTB and CSB have internal pull-up
resistors.
5. Input A[13] has an internal pull-down resistor.
6. All unused inputs should be connected to GROUND.
7. All TECT3 outputs can be tristated under control of the IEEE P1149.1 test
access port, even those which do not tristate under normal operation. All
outputs and bi-directionals are 5 V tolerant when tristated.
8. Power to the VDD3.3 and VDDQ pins should be applied before power to the
VDD2.5 pins is applied. Similarly, power to the VDD2.5 pins should be
removed before power to the VDD3.3 and VDDQ pins are removed.
9. All TECT3 inputs are 5V tolerant.
PROPRIETARY AND CONFIDENTIAL
54