PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
1.14
SCALEABLE BANDWIDTH INTERCONNECT (SBI) INTERFACE ...................44
1.14.1 INTERFACING OCTLIUS TO A HIGH DENSITY FRAMER..................45
SBI EXTRACTER AND PISO.............................................................................46
SBI INSERTER AND SIPO ................................................................................46
SBI TO CLK/DATA CONVERTER......................................................................46
SERIAL PROM INTERFACE..............................................................................46
JTAG TEST ACCESS PORT..............................................................................48
MICROPROCESSOR INTERFACE...................................................................48
1.15
1.16
1.17
1.18
1.19
1.20
2
3
4
NORMAL MODE REGISTER DESCRIPTION ................................................................49
2.1 NORMAL MODE REGISTER MEMORY MAP...................................................50
TEST FEATURES DESCRIPTION................................................................................169
3.1 JTAG TEST PORT............................................................................................169
OPERATION..................................................................................................................172
4.1
4.2
4.3
4.4
4.5
4.6
4.7
CONFIGURING THE OCTLIU FROM RESET.................................................172
SERVICING INTERRUPTS..............................................................................172
USING THE PERFORMANCE MONITORING FEATURES ............................173
USING THE TRANSMIT LINE PULSE GENERATOR.....................................173
USING THE LINE RECEIVER .........................................................................194
USING THE PRBS GENERATOR AND DETECTOR ......................................201
LOOPBACK MODES .......................................................................................201
4.7.1 LINE LOOPBACK................................................................................201
4.7.2 DIAGNOSTIC DIGITAL LOOPBACK ..................................................202
JTAG SUPPORT ..............................................................................................202
4.8.1 TAP CONTROLLER ............................................................................204
4.8
5
FUNCTIONAL TIMING..................................................................................................210
5.1 SBI BUS INTERFACE TIMING ........................................................................210
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
ii
PMC [ PMC-SIERRA, INC ]
