PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
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FEATURES
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Monolithic device which integrates eight T1/J1 or E1 short haul and long haul line interface circuits.
Software switchable between T1/J1 and E1 operation on a per-device basis.
Meets or exceeds T1/J1 and E1 shorthaul and longhaul network access specifications including ANSI
T1.102, T1.403, T1.408, AT&T TR 62411, ITU-T G.703, G.704 as well as ETSI 300-011, CTR-4, CTR-
12 and CTR-13.
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Provides encoding and decoding of B8ZS, HDB3 and AMI line codes.
Provides receive equalization, clock recovery and line performance monitoring.
Provides transmit and receive jitter attenuation.
Provides digitally programmable long haul and short haul line build out.
Provides a selectable, per channel independent de-jittered T1 or E1 recovered clock for system timing
and redundancy.
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Provides PRBS generators and detectors on each tributary for error testing at DS1 and E1 rates as
recommended in ITU-T O.151.
Provides either serial clock/data or parallel Scaleable Bandwidth Interconnect (SBI) interfaces on the
system side.
Can be configured to act as a converter between the SBI interfaces and serial clock/data. In this
mode, the LIUs are unused.
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Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring.
Provides a hardware-only (no microprocessor) mode in which configuration data is read from an SPI-
compatible serial PROM. The PROM interface can be cascaded such that multiple OCTLIU devices
can be configured simultaneously from a single PROM.
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Uses line rate system clock.
Provides an IEEE 1149.1 (JTAG) compliant Test Access Port (TAP) and controller for boundary scan
test.
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Implemented in a low power 3.3 V tolerant 1.8/3.3 V CMOS technology.
Available in a high density 288-pin Tape-SBGA (23 mm by 23 mm) package.
Provides a –40°C to +85°C Industrial temperature operating range.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
