PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
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APPLICATION EXAMPLES
Figure 1 - Example 1. T1 or E1 ATM Interfaces
1X Transm it Reference Clock
DSX-1
or
E1
Analog
Interfaces
PM 7344
S/UNI-M PH
PM 4314
QDSX
Quad T1/E1
Multi-PHY
User Network Interface
Quad T1/E1
Line Interface Device
SCI-PHYTM
Multi-PHY
ATM Cell Bus
Crystal Oscillator 24X Clock
(37.056 MHz for T1 or 49.152 MHz
for E1) if using jitter attenuator or
XPLS W IDEN function. 8X clock
otherwise.
Generic
Microprocessor
Bus
Example 1 shows the PM4314 QDSX used with the PM7344 S/UNI-MPH to
implement a quad T1/E1 UNI where the DS1 or E1 signals are presented on
DSX-1 or E1 electrical interfaces.
In this example, the DSX-1 or E1 line interface functions are provided by the
QDSX and the DS-1 or E1 framing functions are provided by the S/UNI-MPH.
The S/UNI-MPH also provides the ATM cell processing functions associated with
the PHY layer, including the implementation of a SCI-PHY multi-PHY interface to
the ATM layer device(s). The combination of the QDSX device with the S/UNI-
MPH allows both ANSI/ITU compliant DSX-1/E1 analog signals and ATM Forum
UNI 3.1 and ITU G.804 compliant DS1/E1 digital signals to be processed.
Jitter attenuation by both the QDSX and the S/UNI-MPH can be performed by
supplying a 24X reference clock to the devices. If jitter attenuation is to be
executed by the S/UNI-MPH only, then an 8X reference clock is required by the
QDSX and a 24X reference clock is required by the S/UNI-MPH. If jitter
attenuation is to be executed by the QDSX, then a 24X reference clock must be
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
