Pm29F002
PMC
COMMAND DEFINITION
Table 4. Software Command Definition
1st Bus
Cycle
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cylce
6th Bus
Cycle
Command
Sequence
Bus
Cycle
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read
1
6
6
Addr DOUT
Chip Erase
Block Erase
555h AAh
555h AAh
2AAh 55h 555h 80h
2AAh 55h 555h 80h
555h AAh
555h AAh
2AAh 55h 555h 10h
2AAh 55h BA (1) 30h
Byte
Program
4
6
555h AAh
555h AAh
2AAh 55h 555h A0h
2AAh 55h 555h 80h
Addr DIN
Boot Block
Lockout (2,3)
555h AAh
2AAh 55h 555h 40h
BA (4) 00h (5)
BA (4) 01h (5)
Boot Block
Lockout
3
555h AAh
2AAh 55h 555h 90h
Detection (3)
Product
Manufacturer ID
3
3
3
3
1
555h AAh
555h AAh
555h AAh
555h AAh
XXXh F0h
2AAh 55h 555h 90h
2AAh 55h 555h 90h
2AAh 55h 555h 90h
2AAh 55h 555h F0h
X00h 9Dh
X01h 1Dh
X01h 2Dh
Product Device
ID (Top Boot)
Product Device
ID (Bottom Boot)
Product ID
Exit (6)
Product ID
Exit (6)
Notes:
1. BA = Block address of the block to be erased.
2. When the boot block lockout feature is enabled, the boot block will not be erased when a chip erase
command or a block erase command for boot block erasure is issued. Once the boot block is not
protected, the boot block will be erased when a chip erase command or a block erase command for
boot block erasure is issued.
3. After completion of the boot block lockout enable or detection command, the Product ID Exit com-
mand must be issued to return to standard read mode.
4. BA = Block address of the boot block;
For top boot block location, A0 = “0”, A1 = “1”, and A14-A17 = “1” where A2-A13 = Don’t Care;
For bottom boot block location, A0 = “0”, A1 = “1”, and A14-A17 = “0” where A2-A13 = Don’t Care.
5. I/O0 = “1” means boot block lockout is enabled, I/O0 = “0” means boot block lockout is disabled.
6. Either one of the Product ID Exit command can be used.
Issue Date: March, 2001 Rev: 1.0
Programmable Microelectronics Corp.
8
PMC [ PMC-SIERRA, INC ]
