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PEX8532-BB25BI 参数 Datasheet PDF下载

PEX8532-BB25BI图片预览
型号: PEX8532-BB25BI
PDF下载: 下载PDF文件 查看货源
内容描述: [PCI Bus Controller, CMOS, PBGA680, 35 X 35 MM, 2.23 MM HEIGHT, 1 MM PITCH, BGA-680]
分类和应用: 时钟数据传输PC外围集成电路
文件页数/大小: 512 页 / 4374 K
品牌: PLX [ PLX TECHNOLOGY ]
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PEX 8532 Transparent Mode Port Registers  
PLX Technology, Inc.  
Register 11-181. A04h, A1Ch, A34h, A4Ch INCH Threshold Port n VC0 Non-Posted (OnlyPorts 0 and 8,  
where n = 0 through 3 for Station 0 ports, and n = 8 through 11 for Station 1 ports)  
Serial  
EEPROM  
Bit(s)  
Description  
Type  
Default  
Non-Posted credits are used for Virtual Channel 0 (VC0) Memory Read, I/O Read, I/O Write, Configuration Read,  
and Configuration Write transactions.  
Payload  
Minimum value = 0_0000_0001b.  
Silicon Revision AA  
Payload = 0_0000_1001b = 9 Payload Credits (144 bytes).  
8:0  
Silicon Revisions BA/BB/BC  
Payload = 0_0000_0111b = 7 Payload Credits (112 bytes).  
AA – 1209h  
BA/BB/BC – 0E07h  
RW  
Yes  
Header  
Minimum value = 00_001b.  
Silicon Revision AA  
Header = 01_001b = 9 Header Credits.  
13:9  
Silicon Revisions BA/BB/BC  
Header = 00_111b = 7 Header Credits.  
31:14  
Reserved  
0-0h  
Register 11-182. A08h, A20h, A38h, A50h INCH Threshold Port n VC0 Completion (Only Ports 0 and 8,  
where n = 0 through 3 for Station 0 ports, and n = 8 through 11 for Station 1 ports)  
Serial  
EEPROM  
Bit(s)  
Description  
Type  
Default  
Completion credits are used for Virtual Channel 0 (VC0) Memory Read, I/O Read, I/O Write, Configuration Read,  
and Configuration Write transaction Completions.  
2:0  
Reserved  
Payload  
Reserved bits [2:0] force the Payload Credits to be a multiple of 8.  
Minimum value = Maximum Payload Size (MPS; encoded in  
offset 70h[7:5]) or size of largest Read request (whichever is smaller),  
divided by 16, rounded up to a multiple of 8.  
Minimum value for MPS or largest Read request greater than  
128 bytes is 0_0001_0b; otherwise, the minimum value is 0_0000_1b.  
8:3  
Silicon Revision AA  
Payload = 0_0101_1b = Bh, shifted left 3 bits is 58h = 88 Payload  
Credits (1,408 bytes).  
AA – 0A58h  
BA/BB/BC – 1480h  
RW  
Yes  
Silicon Revisions BA/BB/BC  
Payload = 0_1000_0b = 10h, shifted left 3 bits is 00h = 128 Payload  
Credits (2,048 bytes).  
Header  
Minimum value = 00_001b.  
Silicon Revision AA  
Header = 00_101b = 5h = 5 Header Credits.  
13:9  
Silicon Revisions BA/BB/BC  
Header = 01_010b = Ah = 10 Header Credits.  
31:14  
Reserved  
0-0h  
280  
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book  
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6