PCI Initiator
Type 0 and Type 1 configuration cycles
850/860 processor. The PCI 9054’s flexi-
ble, 3.3V, 5V tolerant I/O buffers com-
bined with a local bus operation up to
50MHz is ideally suited for current and
future PowerQUICC processors. The
PCI 9054 also provides support for the
MPC860 IDMA channel for movement of
data between internal MPC860 I/O and
the PCI bus. In addition, the PCI9054
also makes use of the advanced Data
Pipe Architecture including unlimited
burst capability as shown in figure 1.
PCI 9054 I/O Accelerator
■
The PCI 9054, a 32-bit 33MHz Bus
Master I/O Accelerator, is the most
advanced general purpose bus master
device available. It offers a robust PCI v2.2
specification implementation enabling
burst transfers up to 132Mbytes/second.
The PCI 9054 incorporates PLX’s industry
leading Data Pipe ArchitectureTM including
DMA engines, programmable PCI
■
All PCI Memory and I/O cycles supported
■
Initiator READ prefetching
■
Burst length control—programmable
threshold pointer
■
Unaligned transfer control
■
Endian swapping
PCI Target
■
Multiple independent address spaces
Initiator and Target data transfer modes
and PCI messaging functions.
■
Dynamic local bus width control
■
Target READ prefetching
1
For PowerQUICC IDMA operation,
Data Pipe Architecture™
■
the PCI 9054 transfers data to PCI
under the control of the IDMA hand-
shake protocol.
Endian swapping
■
Local bus priority control
Dual DMA Channels
■
■
Latency timer
Dual independent channels—provides
2
At the same time, the PCI 9054 Data
flexible prioritization scheme
PCI Messaging
Pipe Architecture™ DMA can be oper-
ated bi-directionally, with the PCI 9054
as the master for both buses, to manage
transfers of data from the local bus
to the PCI bus or from the PCI bus to
the local bus. This is a prime example
of how the PCI 9054 provides superior
general purpose bus master perfor-
mance and gives the designer using the
PowerQUICC processor greater flexibility
in implementing multiple simultaneous
I/O transfers. The PCI9054 has unlimit-
ed bursting capability which enhances
any MPC860 PowerQUICC design.
■
Direct H/W control of DMA
■
Complete messaging unit with mailbox
-Demand mode DMA operation
-Block Mode or Scatter/Gather operation
-End of Transfer (EOT) signal
registers, doorbell registers
■
Queue management pointers which can
be used for message passing under the
I O protocol or a custom protocol.
2
■
Programmable burst length including
PCI 9054 PCI Applications
unlimited burst
High performance Motorola MPC
850/860 PowerQUICC Designs
A key application for the PCI 9054 is
Motorola MPC 850/860 based adapters
for telecom and networking applications.
■
Shuttle mode DMA channel support
—Automatic invalidation of used
DMA descriptors
■
Unaligned transfer support
2
High Performance CompactPCI
1
PowerQUICC
MPC860
Adapter Designs
MEM
Another key application for the PCI 9054
is CompactPCI adapters for telecom and
networking applications. These applica-
tions include high performance commu-
nications like WAN/LAN controller cards,
high speed modem cards, frame relay
cards, and telephony cards for telecom
switches and remote access systems.
The PCI 9054 has intergrated key
IDMA
2
Local Bus
PCI 9054
I/O Accelerator
DMA 0
DMA 1
ROM
Figure 1.
features to enable live-insertion of Hot
Swap CompactPCI adapters. The PCI
9054 PICMG2.1 compatible Hot Swap
Friendly PCI interface includes both Hot
Swap Capable and Friendly features:
High Performance MPC860
PowerQUICC Adapter Design
PCI Bus
■
■
Supports PCIbus mastering from local
slave-only devices
These applications include high perfor-
mance communications like WAN/LAN
controller cards, high speed modem cards,
frame relay cards, and networking cards
for routers and switches to name a few.
The PCI 9054 simplifies designs by pro-
viding an industry leading enhanced
direct-connect interface to the MPC
Scatter/Gather list management
Hot Swap Capable
-Descriptors can be in the PCI or local
bus memory
■
PCI specification v2.1 or better
■
Tolerant of V from early power
cc
-Allows independent scatter/gather
ring management
■
Tolerant of asynchronous reset
■
Tolerant of precharge voltage