SM55TZ Series 0.8-2.0 V
CMOS Clock Oscillators
March 2013
Mechanical:
Inches
mm
A
0.197 _+0.006
5.00 _+0.15
B
C
0.126 _+0.006
0.045 _+0.004
3.20 _+0.15
1.15 _+0.10
1.23
D1 0.048
E1 0.100
2.54
F1
0.004
0.10
G1 0.050
H1 0.055
1.27
1.40
I1
0.024
0.004
0.60
J1
0.10R
0.020R
Not to Scale
Contacts :
Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm)
K1 0.008
1 Typical dimensions
Pad
Function
Note
1
Output
Enable/Disable
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to VCC if the oscillator is to be always on.
2
3
4
Ground (GND)
Output
Supply Voltage
(VCC)
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
•
•
•
•
a ground plane under the device
no large transient signals (both current and voltage) should be routed under the device
do not layout near a large magnetic field such as a high frequency switching power supply
do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
6
PLETRONICS [ PLETRONICS, INC. ]
