PixArt Imaging Inc.
PAS005B
CMOS Image Sensor IC
5.2.2 Slave transmits data to master (read cycle)
The sub-address was taken from previous write cycle
The sub-address is automatically increment after each byte read
Am : Acknowledge by master
Note there is no acknowledgment from master after last byte read
1ST BYTE
2ND BYTE
n BYTE
Am
SLAVE ADDRESS
(7 BITS)
S
RW
A
DATA (8 BIT)
Am DATA
DATA
1
P
NO ACK IN LAST
BYTE
During read cycle, the master generates start condition and then place the 1st byte data that are combined
slave address (7 bits) with a read/write control bit to SDA line. After issue acknowledgment, 8 bits DATA was
also placed on SDA line by PAS005B. The 8 bit data was read from PAS005B internal control register that
address was assigned by previous write cycle. Follow the master acknowledgment, the PAS005B place the next 8
bits data (address is increment automatically) on SDA line and then transmit to master serially. The DATA and
Am cycles is repeat until the last byte read. After last byte read, Am is no longer generated by master but instead
by keep SDA line high. The slave (PAS005B) must releases SDA line to master to generate STOP condition.
(Please refer to Fig 5.3.)
SDA
SCL
1-7
8
9
1-7
8
9
1-7
8
9
P
S
ACK
from
Receiver
ACK
from
Receiver
Stop
Condition
ACK
from
Receiver
Address
R/W
Data
Data
Start
Condition
Fig 5.3 Data Transfer Format
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PixArt Imaging Inc.
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PIXART [ PIXART IMAGING INC. ]
