PixArt Imaging Inc.
Low Power LED Integrated Slim Mouse Sensor
During a read operation SCLK should be delayed at least Burst mode is activated by reading the Motion_Burst
after the last address data bit to ensure that the register. The ADNS-3530 will respond with the contents
t
SRAD
ADNS-3530 has time to prepare the requested data. The of the Motion, Delta_Y, Delta_X, SQUAL, Shutter_Upper,
falling edge of SCLK for the first address bit of either the Shutter_Lower and Maximum_Pixel registers in that or-
read or write command must be at least t
or t
af- der. The burst transaction can be terminated after the
SRR
SRW
ter the last SCLK rising edge of the last data bit of the first three bytes of the sequence are read by bringing
previous read operation.
the NCS pin high. After sending the register address, the
microcontroller must wait t and then begin reading
data. All data bits can be read with no delay between
bytes by driving SCLK at the normal rate. The data is
latched into the output buffer after the last address bit
is received. After the burst transmission is complete, the
SRAD
Burst Mode Operation
Burst mode is a special serial port operation mode that
may be used to reduce the serial transaction time for
a motion read. The speed improvement is achieved by
continuous data clocking from multiple registers with-
out the need to specify the register address, and by not
requiring the normal delay period between data bytes.
microcontroller must raise the NCS line for at least t
BEXIT
to terminate burst mode. The serial port is not available
for use until it is reset with NCS, even for a second burst
transmission.
t
SRAD
tꢀtꢀtꢀ
SCLK
MOTION_BURST REGISTER ADDRESS
READ FIRST BYTE
tꢀtꢀtꢀ
FIRST READ OPERATION
READ SECOND BYTE
READ THIRD BYTE
Figure 18. Motion burst timing
Notes on Power-Up
4. Read from registers 0x02, 0x03 and 0x04 (or read
these same three bytes from burst motion register
0x42) one time regardless the state of the motion
pin.
The ADNS-3530 does not perform an internal power up
self-reset; the POWER_UP_RESET register must be writ-
ten every time power is applied. The appropriate se-
quence is as follows:
During power-up there will be a period of time after the
power supply is high but before any clocks are available.
The table below shows the state of the various pins dur-
ing power-up and reset.
1. Apply power
2. Drive NCS high, then low to reset the SPI port
3. Write 0x5a to register 0x3a
State of Signal Pins After V is Valid
DD
Pin
On Power-Up
Functional
Undefined
Ignored
NCS High Before Reset
High
NCS Low Before Reset
Low
After Reset
NCS
Functional
MISO
SCLK
MOSI
Undefined
Ignored
Functional
Functional
Functional
Depends on NCS
Depends on NCS
Depends on NCS
Ignored
Ignored
XY_LED
MOTION
SHTDWN
Undefined
Undefined
Must Be Low
Undefined
Undefined
Must Be Low
Undefined
Undefined
Must Be Low
Functional
Functional
Functional
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