PixArt Imaging Inc.
High-Performance Optical Mouse Sensor
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V =3.3V, fclk=24MHz.
DD3
Parameter
Symbol
tOP
Min.
Typical
Max.
250
35
Units
s
Notes
VDD to RESET
From VDD = 3.0V to RESET sampled
Data delay
after RESET
tPU-RESET
ms
From RESET falling edge to valid motion data at
2000 fps and shutter bound 8290.
Input delay
after reset
TIN-RST
tPD
500
2.1
75
s
From RESET falling edge to inputs active (NPD,
MOSI, NCS, SCLK)
Power Down
ms
ms
From NPD falling edge to initiate the power down
cycle at 500fps (tpd = 1 frame period + 100ms )
Wake from NPD
tPUPD
From NPD rising edge to valid motion data at
2000 fps and shutter bound 8290. Max assumes
surface change while NPD is low.
Data delay
after NPD
tCOMPUTE
tPW-RESET
3.1
ms
From NPD rising edge to all registers contain data
from new images at 2000fps (see Figure 10) .
RESET pulse width
10
s
MISO rise time
MISO fall time
tr-MISO
40
40
200
200
120
ns
ns
ns
CL = 50pF
CL = 50pF
tf-MISO
MISO delay
afterSCLK
tDLY-MISO
From SCLK falling edge to MISO data valid, no
load conditions
MISO hold time
MOSI hold time
thold-MISO
thold-MOSI
250
200
ns
ns
Data held until next falling SCLK edge
Amount of time data is valid after SCLK rising
edge
MOSI setup time
tsetup-MOSI
tSWW
120
50
ns
From data valid to SCLK rising edge
SPI time between
write commands
s
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second data byte.
SPI time between
write and read
commands
tSWR
50
s
ns
s
s
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second address
byte.
SPI time between
read and subsequent tSRR
commands
tSRW
250
50
From rising SCLK for last bit of the first data byte,
to falling SCLK for first bit of the second address
byte.
SPI read
address-data
delay
tSRAD
From rising SCLK for last bit of the address byte,
to falling SCLK for first bit of data being read. All
registers except Motion & Motion_Burst
SPI motion read
address-data
delay
tSRAD-MOT
75
From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. Applies
to 0x02 Motion, and 0x50 Motion_Burst, registers
NCS to SCLK active
tNCS-SCLK
120
120
ns
ns
From NCS falling edge to first SCLK rising edge
SCLK to NCS inactive tSCLK-NCS
From last SCLK falling edge to NCS rising edge,
for valid MISO data transfer
NCS to MISO high-Z tNCS-MISO
250
ns
From NCS rising edge to MISO high-Z state
(see Figure 23 and 24)
SROM download and tLOAD
frame capture
byte-to-byte delay
10
4
s
NCS to burst mode
exit
tBEXIT
s
Time NCS must be held high to exit burst mode
Transient Supply
Current
IDDT
85
mA
Max supply current during a VDD3 ramp from 0 to
3.6V
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PixArt Imaging Inc.
11
E-mail: fae_service@pixart.com.tw