Philips Semiconductors
Preliminary specification
I
2
C-bus controlled BTSC stereo/SAP decoder
TDA9850
SYMBOL
SAP output
Z
o
V
O
R
L
C
L
V
o(rms)
PARAMETER
CONDITIONS
−
−
5
−
150
µs
de-emphasis
MIN.
TYP.
MAX.
UNIT
Ω
V
kΩ
nF
output impedance
DC output voltage
output load resistance
(AC-coupled)
output load capacitance
nominal output voltage
(RMS value)
80
−
−
120
−
2.5
see Fig.3
0.5V
CC
−1.5 −
Outputs OUTL and OUTR
V
o(rms)
HEAD
o
Z
o
V
O
R
L
C
L
α
ct
nominal output voltage
(RMS value)
output headroom
output impedance
DC output voltage
output load resistance
(AC-coupled)
output load capacitance
crosstalk L, R into SAP
100% modulation;
f
i
= 1 kHz; L or R;
mode selector switched
to SAP/SAP
100% modulation;
f
i
= 1 kHz; SAP;
mode selector switched
to stereo
250 Hz to 6.3 kHz
100% modulation
−
9
−
5
−
50
500
−
80
−
−
75
−
−
120
−
2.5
−
mV
dB
Ω
kΩ
nF
dB
0.45V
CC
−1.5
0.5V
CC
−1.5
0.55V
CC
−1.5
V
crosstalk SAP into L, R
50
70
−
dB
∆V
ST-SAP
output voltage difference
if switched from L, R to
SAP
−
−
3
dB
Dbx noise reduction circuit
t
adj
I
s
stereo adjustment time
nominal timing current for
nominal release rate of
spectral RMS detector
spread of timing current
timing current range
timing current for release
rate of wideband RMS
detector
nominal RMS detector
release rate
wideband
spectral
1995 Jun 19
13
nominal timing current
and external capacitor
values
7 steps via I
2
C-bus
see Section “Adjustment
procedure”
−
−
24
1
−
s
µA
I
s
can be measured at pin
−
C
TS
via current meter
connected to
1
⁄
V
2 CC
+ 0.25 V
−15
−
−
∆I
s
I
s range
I
t
−
±30
1
⁄
3
I
s
+15
−
−
%
%
µA
Rel
rate
−
−
125
381
−
−
dB/s
dB/s