Philips Semiconductors
Product specification
Single standard VIF-PLL demodulator
and FM-PLL detector
SYMBOL
I
o(sink)(max)
I
o(source)(max)
B
v(−3dB)
α
H(sup)
PSRR
VSO
PARAMETER
maximum AC and DC
output sink current
maximum AC and DC
output source current
−3
dB video bandwidth
harmonics suppression in
video signal
power supply ripple
rejection at pin VSO
C
L
< 50 pF; R
L
> 1 kΩ
C
L
< 50 pF; R
L
> 1 kΩ;
note 10
see Fig.7
CONDITIONS
MIN.
1.4
2.0
7
35
32
−
−
10
40
35
TYP.
−
−
−
−
−
TDA9801
MAX.
UNIT
mA
mA
MHz
dB
dB
Buffer amplifier and noise clipper input: pin VI
R
i
C
i
V
I
G
v
B
v(−3dB)
V
o(v)(p-p)
V
v(clu)
V
v(cll)
V
sync
R
o
I
bias
I
o(sink)(max)
I
o(source)(max)
input resistance
input capacitance
DC input voltage
pin VI not connected
2.6
1.4
1.5
3.3
2
1.8
4.0
3.0
2.1
kΩ
pF
V
Buffer amplifier output: pin CVBS
voltage gain
−3
dB video bandwidth
video output voltage
(peak-to-peak value)
upper video clipping
voltage level
lower video clipping voltage
level
sync pulse voltage level
output resistance
DC bias current
maximum AC and DC
output sink current
maximum AC and DC
output source current
internal emitter-follower at
pin CVBS
note 11
C
L
< 20 pF; R
L
> 1 kΩ
sound carrier off;
see Fig.12
6
8
1.7
3.9
−
−
−
1.8
1.4
2.4
7
11
2.0
4.0
1.0
1.35
−
2.5
−
−
7.5
−
2.3
−
1.1
−
10
−
−
−
dB
MHz
V
V
V
V
Ω
mA
mA
mA
Measurements from VIF inputs to CVBS output (330
Ω
connected between pins VSO and VI, sound carrier off)
V
o(CVBS)(p-p)
∆V
o(CVBS)
CVBS output voltage
(peak-to-peak value)
deviation of CVBS output
voltage
V
P
= 5 V
V
P
= 9 V
at B/G standard
50 dB gain control
30 dB gain control
∆V
o(bl)
G
dif
ϕ
dif
B
v(−3dB)
black level tilt
differential gain
differential phase
−3
dB video bandwidth
gain variation; note 12
−
−
−
−
−
6
−
−
−
2
2
8
0.5
0.1
1
5
4
−
dB
dB
%
%
deg
MHz
1.7
1.8
2.0
2.2
2.3
2.6
V
V
“CCIR, line 330”
or
“NTC-7 Composite”
“CCIR, line 330”
or
“NTC-7 Composite”
C
L
< 20 pF; R
L
> 1 kΩ
1999 Aug 26
9