Philips Semiconductors
Preliminary specification
Stereo Continuous Calibration DAC
(CC-DAC)
SYMBOL
Timing
(see Fig.4)
t
r
t
f
t
CY
t
BCKH
t
BCKL
t
SU;DAT
t
HD:DAT
t
HD:WS
t
SU;WS
rise time
fall time
bit clock cycle time
bit clock pulse width HIGH
bit clock pulse width LOW
data set-up time
data hold time to bit clock
word select hold time
word select set-up time
−
−
54
15
15
12
2
2
12
−
−
−
−
−
−
−
−
−
12
12
−
−
−
−
−
−
−
PARAMETER
CONDITIONS
MIN.
TYP.
TDA1311A
MAX.
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
Analog outputs; pins V
OL
and V
OR
V
FS
TC
FS
V
os
(THD+N)/S
full-scale voltage
full-scale temperature
coefficient
offset voltage
total harmonic distortion plus
noise
V
DD
= V
OL/ORmax
at 0 dB signal level; note 1
at
−60
dB signal level; note 1
at
−60
dB signal level;
A-weighted; note 1
at 0 dB signal level; f = 20 Hz
to 20 kHz
t
cs
α
cs
|δI
O
|
|t
d
|
S/N
Note
1. Measured with 1 kHz sinewave generated at sampling rate of 192 kHz.
current settling time to
±1
LSB
channel separation
unbalance between outputs
time delay between outputs
signal-to-noise ratio at
bipolar zero
A-weighted at code 0000H
note 1
1.8
−
0.45
−
−
−
−
−
−
−
−
−
75
−
−
86
2.0
±400
0.50
−68
0.04
−30
3
−33
2
−65
0.05
0.2
80
0.2
±0.2
92
2.2
−
0.55
−63
0.07
−24
6
−
−
−61
0.09
−
−
0.3
−
−
V
ppm
V
dB
%
dB
%
dB
%
dB
%
µs
dB
dB
µs
dB
1995 Dec 18
7
PHILIPS [ NXP SEMICONDUCTORS ]
