Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
8.3.2
HORIZONTAL SCALING
• The bit XC2_1[A2H[3]], which defines the weighting of
the incoming pixels during the averaging process
The overall horizontal required scaling factor has to be split
into a binary and a rational value according to the
equation:
– XC2_1 = 0
– XC2_1 = 1
1 + 1...+ 1 +1
1 + 2...+ 2 +1
output pixel
H-scale ratio =
H-scale ratio =
The prescaler builds a prescale dependent FIR low-pass,
with up to (64 + 7) filter taps. The parameter XACL[5:0]
can be used to vary the low-pass characteristic for a given
integer prescale of 1⁄XPSC[5:0]. The user can therewith
decide between signal bandwidth (= sharpness
impression) and alias.
------------------------------
input pixel
1
1024
×
--------------------------- ------------------------------
XPSC[5:0] XSCY[12:0]
where, parameter of prescaler XPSC[5:0] = 1 to 63 and
parameter of VPD phase interpolation
XSCY[12:0] = 300 to 8191 (0 to 299 are only theoretical
values). For example, 1⁄3.5 is to split in 1⁄4 × 1.14286. The
binary factor is processed by the prescaler, the arbitrary
non-integer ratios is achieved via the variable phase delay
VPD circuitry, called horizontal fine scaling. Latter
calculates horizontally interpolated new samples with a
6-bit phase accuracy, which relates to less than 1 ns jitter
for regular sampling scheme. Prescaler and fine scaler are
building the horizontal scaler of the SAA7114H.
Equation for XPSC[5:0] calculation is:
Npix_in
XPSC[5:0] = lower integer of
-----------------------
Npix_out
where,
the range is 1 to 63 (value 0 is not allowed!);
Npix_in = number of input pixel, and
Npix_out = number of desired output pixel over the
complete horizontal scaler.
Using the accumulation length function of the prescaler
(XACL[5:0]A1H[5:0]), application and destination
dependent (e.g. scale for display or for a compression
machine), a compromise between visible bandwidth and
alias suppression can be found.
The use of the prescaler results in a XACL[5:0] and
XC2_1 dependent gain amplification. The amplification
can be calculated according to the equation:
DC gain = ((XACL − XC2_1) + 1) × (XC2_1 + 1)
It is recommended to use sequence lengths and weights,
which results in a 2N DC gain amplification, as these
amplitudes can be renormalized by the XDCG[2:0]
8.3.2.1
Horizontal prescaler (subaddresses
A0H to A7H and D0H to D7H)
The prescaling function consists of an FIR anti-alias filter
stage and an integer prescaler, which is building an
adaptive prescale dependent low-pass filter, to balance
sharpness and aliasing effects.
1
controlled
shifter of the prescaler.
------
2 N
The renormalization range of XDCG[2:0] is 1, 1⁄2... down to
1
⁄
.
The FIR prefilter stage implements different low-pass
characteristics to reduce alias for down-scales in the range
of 1 to 1⁄2. A CIF optimized filter is build in, which reduces
artefacts for CIF output formats (to be used in combination
with the prescaler set to 1⁄2 scale). See Table 10.
128
Other amplifications have to be normalized by using the
following BCS control circuitry. In these cases the
prescaler has to be set to an overall gain ≤1, e.g. for an
accumulation sequence of ‘1 + 1 + 1’ (XACL[5:0] = 2 and
XC2_1 = 0), XDCG[2:0] must be set to ‘010’, equals 1⁄4
and the BCS has to amplify the signal to 4⁄3
(SATN[7:0] and CONT[7:0] value = lower integer of
4⁄3 × 64).
The functionality of the prescaler is defined by:
• An integer prescaling ratio XPSC[5:0]A0H[5:0]
(= 1 to 63), which covers the integer down-scale
range 1 to 1⁄63
The use of XACL[5:0] is XPSC[5:0] dependent.
XACL[5:0] must be ≤2 × XPSC[5:0].
• An averaging sequence length XACL[5:0]A1H[5:0]
(= 0 to 63); range 1 to 64
• A DC gain renormalization XDCG[2:0]A2H[2:0];
1 down to 1⁄128
XACL[5:0] can be used to find a compromise between
bandwidth (= sharpness) and alias effects.
2000 Mar 15
42
NXP [ NXP ]
