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a
TEST
SELECTOR
AND
22
AOUT
BUFFER
15
9
V
V
SSA1
SSA2
[
]
AOSL 1:0
13
AI2D
ANALOG
AMPLIFIER
DAC9
SOURCE
SWITCH
CLAMP
CIRCUIT
ANTI-ALIAS
FILTER
BYPASS
SWITCH
10, 12,
14, 16
ADC2
AI24 to AI21
17
11
V
DDA1
[
]
FUSE 1:0
V
DDA2
18
19
20
AI12
AI1D
AI11
ANALOG
AMPLIFIER
DAC9
CLAMP
CIRCUIT
ANTI-ALIAS
FILTER
BYPASS
SWITCH
SOURCE
SWITCH
ADC1
[
]
FUSE 1:0
VERTICAL
BLANKING
CONTROL
MODE
CONTROL
CLAMP
CONTROL
GAIN
CONTROL
ANTI-ALIAS
CONTROL
HCL
VBLNK
SVREF
GLIMB HSY
GLIMT
WIPA
VBSL
HOLDG
GAFIX
WPOFF
GUDL0-GUDL2
GAI20-GAI28
GAI10-GAI18
HLNRS
MODE 3
MODE 2
MODE 1
MODE 0
9
9
SLTCA
ANALOG CONTROL
UPTCV
21
CROSS MULTIPLEXER
AGND
9
9
9
9
MHB530
AD2BYP AD1BYP
CVBS/LUM
CVBS/CHR
Fig.6 Analog input processing using the SAA7114H as differential front-end with 9-bit ADC.