欢迎访问ic37.com |
会员登录 免费注册
发布采购

PCF8575TS/1,112 参数 Datasheet PDF下载

PCF8575TS/1,112图片预览
型号: PCF8575TS/1,112
PDF下载: 下载PDF文件 查看货源
内容描述: [PCF8575 - Remote 16-bit I/O expander for I2C-bus SSOP2 24-Pin]
分类和应用: PC光电二极管外围集成电路
文件页数/大小: 24 页 / 116 K
品牌: NXP [ NXP ]
 浏览型号PCF8575TS/1,112的Datasheet PDF文件第4页浏览型号PCF8575TS/1,112的Datasheet PDF文件第5页浏览型号PCF8575TS/1,112的Datasheet PDF文件第6页浏览型号PCF8575TS/1,112的Datasheet PDF文件第7页浏览型号PCF8575TS/1,112的Datasheet PDF文件第9页浏览型号PCF8575TS/1,112的Datasheet PDF文件第10页浏览型号PCF8575TS/1,112的Datasheet PDF文件第11页浏览型号PCF8575TS/1,112的Datasheet PDF文件第12页  
Philips Semiconductors  
Product specification  
Remote 16-bit I/O expander for I2C-bus  
PCF8575  
7
FUNCTIONAL DESCRIPTION  
Quasi-bidirectional I/Os  
7.1  
The PCF8575’s 16 ports (see Fig.7) are entirely independent and can be used either as input or output ports. Input data  
is transferred from the ports to the microcontroller in the READ mode (see Fig.10). Output data is transmitted to the ports  
in the WRITE mode (see Fig.9).  
This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data direction.  
At power-on the I/Os are HIGH. In this mode only a current source (IOH) to VDD is active. An additional strong pull-up to  
VDD (IOHt) allows fast rising edges into heavily loaded outputs. These devices turn on when an output is written HIGH,  
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being used as inputs. After power-on  
as all the I/Os are set HIGH all of them can be used as input. Any change in setting of the I/Os as either inputs or outputs  
can be done with the write mode. Warning: If a HIGH is applied to an I/O which has been written earlier to LOW, a large  
current (IOL) will flow to VSS. (see Characteristics note 3).  
V
d
DD  
I
write pulse  
OH  
100  
µA  
I
OHt  
data from  
shift register  
D
Q
FF  
P00 to P07  
P10 to 17  
C
I
I
OL  
S
power-on  
reset  
V
SS  
D
C
Q
FF  
I
read pulse  
S
to interrupt  
logic  
data to  
shift register  
MGL540  
Fig.7 Simplified schematic diagram of each I/O.  
7.2  
Addressing  
Figures 8, 9 and 10 show the address and timing diagrams. Before any data is transmitted or received the master must  
send the address of the receiver via the SDA line. The first byte transmitted after the START condition carries the address  
of the slave device and the read/write bit. The address of the slave device must not be changed between the START and  
the STOP conditions. The PCF8575 acts as a slave receiver or a slave transmitter.  
slave address  
handbook, halfpage  
S
0
1
0
0
A2 A1 A0 R/W  
A
MGL541  
Fig.8 Byte containing the slave address and the R/W bits.  
8
1999 Apr 07  
 复制成功!