Philips Semiconductors
Product specification
Remote 8-bit I/O expander for I2C-bus
PCF8574
11 I2C-BUS TIMING CHARACTERISTICS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
I2C-BUS TIMING (see Fig.15; note 1)
fSCL
SCL clock frequency
tolerable spike width on bus
bus free time
−
−
−
−
−
−
−
−
−
−
−
−
−
−
100
kHz
tSW
−
100
−
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
tBUF
4.7
4.7
4.0
4.7
4.0
−
tSU;STA
tHD;STA
tLOW
tHIGH
tr
START condition set-up time
START condition hold time
SCL LOW time
−
−
−
SCL HIGH time
−
SCL and SDA rise time
SCL and SDA fall time
data set-up time
1.0
0.3
−
tf
−
tSU;DAT
tHD;DAT
tVD;DAT
tSU;STO
250
0
data hold time
−
SCL LOW to data out valid
STOP condition set-up time
−
3.4
−
4.0
Note
1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL
and VIH with an input voltage swing of VSS to VDD
.
handbook, full pagewidth
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
t
t
t
HIGH
SU;STA
LOW
1 / f
SCL
SCL
SDA
t
t
t
f
BUF
r
t
t
t
t
t
HD;STA
SU;DAT
VD;DAT
SU;STO
HD;DAT
MBD820
Fig.15 I2C-bus timing diagram.
15
1997 Apr 02
NXP [ NXP ]
