I
2
C-bus: The serial revolution
By replacing complex parallel interfaces with a straightforward yet powerful serial
structure, the I
2
C-bus revolutionized chip-to-chip communications.
Invented by NXP (Philips) more than 30 years ago, the I
2
C-bus uses a simple two-wire
format to carry data one bit at a time. It performs inter-chip addressing, selection,
control, and data transfer. Speeds are up to 400 kHz (Fast-mode), 1 MHz (Fast-mode
Plus), 3.4 MHz (High Speed-mode), or 5 MHz (Ultra Fast-mode).
The I
2
C-bus shrinks the IC footprint and leads to lower IC costs. Plus, since far fewer
copper traces are needed, it enables a smaller PCB, reduces design complexity, and
lowers system cost.
uC
SDA
SCL
Parallel Interface
I
2
C Serial Interface
MCU
I/O
A/D
D/A
LCD
RTC
MCU
1010A
2
A
1
A
0
R/W
New function address
A
0
A
1
A
2
New
function
1010011 R/W
New function address
as assigned
I
2
C-bus devices are available in a wide range of functions. Each slave device has its own I
2
C-bus address, selectable using
address pins set high (1) or low (0). Information is transmitted byte by byte, and each byte is acknowledged by the receiver.
There can be multiple devices on the same bus, and more than one IC can act as master. The master role is typically played by a
microcontroller.
Write data
S
slave address
W
A
data
<
Master
A
data
A
>
SDA
SCL
SDA
Slave
receiver
P
transmitter
n data bytes
Read data
S
slave address
R
A
data
A
data
A
P
receiver
transmitter
SCL
The master always sends the clock
< n data >
bytes
S = Start condition
A = Acknowledge
R/W = read/write
A = Not acknowledge
last data byte
P = Stop condition
PHILIPS [ NXP SEMICONDUCTORS ]
