PCF8563
NXP Semiconductors
Real-time clock/calendar
23. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Marking codes . . . . . . . . . . . . . . . . . . . . . . . . . .2
Table 3. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .5
Table 4. Formatted registers overview . . . . . . . . . . . . . .7
Table 5. Control_status_1 - control and status register 1
(address 00h) bit description . . . . . . . . . . . . . . .8
Table 6. Control_status_2 - control and status register 2
(address 01h) bit description . . . . . . . . . . . . . . .8
Table 7. INT operation (bit TI_TP = 1)[1]. . . . . . . . . . . . . .9
Table 8. VL_seconds - seconds and clock integrity
status register (address 02h) bit description . .10
Table 9. Seconds coded in BCD format . . . . . . . . . . . .10
Table 10. Minutes - minutes register (address 03h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 11. Hours - hours register (address 04h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 12. Days - days register (address 05h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 13. Weekdays - weekdays register (address 06h)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 14. Weekday assignments . . . . . . . . . . . . . . . . . . .12
Table 15. Century_months - century flag and months
register (address 07h) bit description . . . . . . . .12
Table 16. Month assignments in BCD format. . . . . . . . . .12
Table 17. Years - years register (08h) bit description. . . .13
Table 18. Minute_alarm - minute alarm register
(address 09h) bit description . . . . . . . . . . . . . .15
Table 19. Hour_alarm - hour alarm register (address 0Ah)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 20. Day_alarm - day alarm register (address 0Bh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 21. Weekday_alarm - weekday alarm register
(address 0Ch) bit description . . . . . . . . . . . . . .15
Table 22. CLKOUT_control - CLKOUT control register
(address 0Dh) bit description . . . . . . . . . . . . . .17
Table 23. Timer_control - timer control register
(address 0Eh) bit description . . . . . . . . . . . . . .17
Table 24. Timer - timer value register (address 0Fh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 25. Timer register bits value range . . . . . . . . . . . . .18
Table 26. First increment of time circuits after STOP
bit release . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Table 27. Register reset value[1] . . . . . . . . . . . . . . . . . . .22
Table 28. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .30
Table 29. Static characteristics . . . . . . . . . . . . . . . . . . . .31
Table 30. Dynamic characteristics . . . . . . . . . . . . . . . . . .34
Table 31. SnPb eutectic process (from J-STD-020C) . . .42
Table 32. Lead-free process (from J-STD-020C) . . . . . .42
Table 33. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .43
Table 34. Revision history . . . . . . . . . . . . . . . . . . . . . . . .45
PCF8563
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
48 of 50
NXP [ NXP ]
