PCF8563
NXP Semiconductors
Real-time clock/calendar
8.4 Time and date registers
The majority of the registers are coded in the BCD format to simplify application use.
8.4.1 Register VL_seconds
Table 8.
VL_seconds - seconds and clock integrity status register (address 02h) bit
description
Bit
Symbol
VL
Value
Place value Description
7
0
-
clock integrity is guaranteed
1[1]
-
integrity of the clock information is not guaranteed
actual seconds coded in BCD format, see Table 9
6 to 4 SECONDS 0 to 5
ten’s place
unit place
3 to 0
0 to 9
[1] Start-up value.
Table 9.
Seconds coded in BCD format
Seconds value
(decimal)
Digit (unit place)
Upper-digit (ten’s place)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
00
01
02
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
0
1
0
:
09
10
:
0
0
:
0
0
:
0
1
:
1
0
:
0
0
:
0
0
:
1
0
:
58
59
1
1
0
0
1
1
1
1
0
0
0
0
0
1
8.4.1.1 Voltage-low detector and clock monitor
The PCF8563 has an on-chip voltage-low detector (see Figure 7). When VDD drops below
low, bit VL in the VL_seconds register is set to indicate that the integrity of the clock
V
information is no longer guaranteed. The VL flag can only be cleared by using the
interface.
mgr887
V
DD
normal power
operation
period of battery
operation
V
low
t
VL set
Fig 7. Voltage-low detection
PCF8563
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
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