Philips Semiconductors
Product data sheet
16-bit I2C and SMBus I/O port with interrupt
PCA9555
AC SPECIFICATIONS
STANDARD MODE
FAST MODE
I C-BUS
2
2
I C-BUS
SYMBOL
PARAMETER
UNITS
MIN
0
MAX
100
—
MIN
MAX
400
—
f
Operating frequency
0
1.3
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
ns
ns
ns
SCL
t
Bus free time between STOP and START conditions
Hold time after (repeated) START condition
Repeated START condition setup time
Setup time for STOP condition
4.7
4.0
4.7
4.0
0.3
0
BUF
t
—
0.6
—
HD;STA
t
—
0.6
—
SU;STA
SU;STO
VD;ACK
t
—
0.6
—
2
t
Valid time of ACK condition
3.45
—
0.1
0.9
—
t
Data in hold time
0
HD;DAT
3
t
t
Data out valid time
300
250
4.7
4.0
—
—
50
—
VD;DAT
Data setup time
—
100
—
SU;DAT
t
Clock LOW period
—
1.3
—
LOW
t
Clock HIGH period
—
0.6
—
HIGH
1
1
t
F
Clock/Data fall time
300
1000
50
20 + 0.1C
20 + 0.1C
—
300
300
50
b
t
R
Clock/Data rise time
—
b
t
Pulse width of spikes that must be suppressed by the input filters
—
SP
Port Timing
t
t
Output data valid
—
150
1
200
—
—
150
1
200
—
ns
ns
µs
PV
PS
PH
Input data setup time
Input data hold time
t
—
—
Interrupt Timing
t
Interrupt valid
Interrupt reset
—
—
4
4
—
—
4
4
µs
µs
IV
t
IR
NOTES:
1. C = total capacitance of one bus line in pF.
b
2. t
3. t
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
= minimum time for SDA data out to be valid following SCL LOW.
VD;ACK
VD;DAT
SDA
t
t
F
LOW
t
SU;DAT
t
R
t
F
t
R
t
t
BUF
HD;STA
t
SP
SCL
t
t
SU;STD
t
SU;STA
HD;STA
t
t
S
P
S
HD;DAT HIGH
S
R
SU01469
Figure 15. Definition of timing
15
2004 Sep 30
NXP [ NXP ]
