Philips Semiconductors
Product specification
Low power dual voltage comparator
LM193/A/293/A/393/A/2903
DC ELECTRICAL CHARACTERISTICS (Continued)
V+=5VDC, LM193/193A: -55°C T ≤ +125°C, unless otherwise specified. LM293/293A: -25°C T ≤ +85°C, unless otherwise specified.
A
A
LM393/393A: 0°C T ≤ +70°C, unless otherwise specified. LM2903: -40°C T ≤ +125°C, unless otherwise specified.
A
A
LM193
Typ
LM293/393
Typ
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
Min
Max
Min
Max
T =25°C
Over temp.
±2.0
±5.0
±9.0
±2.0
±5.0
±9.0
mV
mV
A
2
V
Input offset voltage
OS
CM
IDR
Input common-mode
T =25°C
0
0
V±-1.5
V±-2.0
0
0
V+-1.5
V+-2.0
V
V
A
V
V
3, 6
voltage range
Over temp.
Differential input
Keep all V s ≥0V
IN
DC
V+
V+
V
1
voltage
(or V-if need)
I
or I
with output
IN(+)
IN(-)
in linear range
T =25°C
A
4
I
Input bias current
BIAS
25
±3.0
16
100
300
25
±5.0
16
250
400
nA
nA
Over temp.
I
-I
IN(+) IN(-)
nA
nA
I
I
Input offset current
Output sink current
T =25°C
±25
±100
±50
±150
OS
A
Over temp.
≥1V , V =0,
IN(+)
V
IN(-)
DC
V ≤1.5V
6.0
6.0
mA
OL
0
DC
T =25°C
A
V
IN(+)
≥1V , V
=0,
IN(-)
DC
V =5V
0
DC
Output leakage current
Supply current
T =25°C
0.1
0.8
0.1
0.8
nA
µA
A
V =30VDC over temp.
1.0
1
1.0
1
0
R =∞ on both comparators,
L
I
mA
CC
T =25°C
A
R =∞ on both comparators,
L
2.5
2.5
mA
V+=30V
A
Voltage gain
R ≥15kΩ, V+=15V
DC
50
200
250
50
200
250
V/mV
V
L
V
IN(-)
≥1V , V
=0,
IN(+)
DC
I
≤4mA
SINK
V
OL
Saturation voltage
T =25°C
400
700
400
700
mV
mV
A
Over temp.
V
IN
=TTL logic swing,
Large signal
response time
V
=1.4V , V =5V
R =5.1kΩ,
L
REF DC RL DC
t
t
300
1.3
300
1.3
ns
LSR
T =25°C
A
V
RL
=5V
,
DC
5
Response time
R =5.1kΩ
L
µs
R
T =25°C
A
NOTES:
1. Positive excursions of input voltage may exceed the power supply level by 17V. As long as the other voltage remains within the
common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (V
DC
DC
below the magnitude of the negative power supply, if used).
2. At output switch point, V ≈ 1.4V , R =0Ω with V+ from 5V to 30V and over the full input common-mode range (0V to V+-1.5V ).
O
DC
S
DC
DC
DC
DC
3. The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the
common-mode voltage range is V+-1.5V, but either or both inputs can go to 30V without damage.
DC
4. The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of
the output so no loading change exists on the reference or input lines.
5. The response time specified is for a 100mV input step with a 5mV overdrive.
6. For input signals that exceed V , only the over-driven comparator is affected. With a 5V supply, V should be limited to 25V maximum,
CC
IN
and a limiting resistor should be used on all inputs that might exceed the positive supply.
4
1995 Nov 27
NXP [ NXP ]
