ISP1362
Single-chip USB OTG controller
Philips Semiconductors
PTD data stored in the HC buffer memory will not be processed unless the respective
control bits (ATL_Active, INTL_Active, ISTL0_BufferFull or ISTL1_BufferFull) in
HcBufferStatus are set.
PTD data in the ATL or interrupt buffer memory can be disabled by setting the
respective skip bit in HcATLSkipMap and HcINTLSkipMap. To skip a particular PTD in
the ATL or interrupt buffer, the HCD may set the corresponding bit of the SkipMap
register. For example, setting the HcATLSkipMap register to 0x0011 will cause
the HC to skip the first and the fifth PTDs in the ATL buffer memory.
Certain fields in the PTD header are used by the HC to inform the HCD about the
status of the transfer. These fields are indicated by the ‘Status Update by HC’ column.
These fields are updated after every transaction to reflect the current status of the
PTD.
buffer memory
top
PTD header
PTD data #1
payload data
PTD header
PTD data #2
payload data
PTD header
PTD data #N
payload data
bottom
004aaa121
Fig 22. PTD data stored in the buffer memory.
Table 9:
Bit
Generic PTD structure: bit allocation
7
6
5
4
3
2
1
0
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
ActualBytes[7:0]
Active
MaxPktSize[7:0]
B3[3]
TotalBytes[7:0]
DirToken[1:0]
CompletionCode[3:0]
EndpointNumber[3:0]
Toggle
Speed
ActualBytes[9:8]
MaxPktSize[9:8]
TotalBytes[9:8]
B5[7]
B5[6]
reserved
reserved
FunctionAddress[6:0]
B7[7:0]
[1] All reserved bits should be set to logic 0.
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
42 of 150
NXP [ NXP ]
