NXP Semiconductors
HEF4094B-Q100
8-stage shift-and-store register
V
I
V
M
OE input
GND
t
PZL
t
PLZ
V
DD
output
V
LOW-to-OFF
OFF-to-LOW
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aai545
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 9. 3-state output enable and disable times for OE input
V
I
V
CP input
M
GND
t
t
su
su
t
t
h
h
V
I
V
D input
M
GND
V
OH
V
QPn, QS1, QS2 output
M
V
OL
001aaf115
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. Data input data set up and hold times
HEF4094B_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 4 July 2013
10 of 18
NXP [ NXP ]
