NXP Semiconductors
HEF4093B
Quad 2-input NAND Schmitt trigger
5. Functional diagram
1A
1
3
1Y
1B
2
2A
5
4
2Y
nA
nY
10
nB
3Y
001aag105
2B
6
3A
8
3B
9
4A
12
11
4Y
4B
13
001aag104
Fig 1.
Functional diagram
Fig 2.
Logic diagram (one gate)
6. Pinning information
6.1 Pinning
1A
1B
1Y
2Y
2A
2B
V
SS
1
2
3
4
5
6
7
001aag106
14 V
DD
13 4B
12 4A
HEF4093B
11 4Y
10 3Y
9
8
3B
3A
Fig 3.
Pin configuration
HEF4093B
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Product data sheet
Rev. 8 — 21 November 2011
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