Philips Semiconductors
Product specification
Programmable divide-by-n counter
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C;
input transition times
≤
20 ns
V
DD
V
Dynamic power
dissipation per
package (P); n = 3
n = 1000
5
10
15
5
10
15
TYPICAL FORMULA FOR P (µW)
1 100 f
i
+ ∑(f
o
C
L
)
×
V
DD2
5 500 f
i
+ ∑(f
o
C
L
)
×
V
DD2
15 000 f
i
+ ∑(f
o
C
L
)
×
V
DD2
500 f
i
+ ∑(f
o
C
L
)
×
V
DD2
3 500 f
i
+ ∑(f
o
C
L
)
×
V
DD2
9 000 f
i
+ ∑(f
o
C
L
)
×
V
DD2
where
HEF4059B
LSI
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
∑(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C;
C
L
= 50 pF; input transition times
≤
20 ns
V
DD
V
Propagation delays
CP
→
O
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
5
10
15
5
10
15
5
10
15
5
LOW to HIGH
Maximum clock
pulse frequency
10
15
5
10
15
f
max
3,5
7,5
10,0
t
TLH
t
THL
t
PLH
t
PHL
SYMBOL
MIN.
TYP.
90
45
35
100
50
40
30
15
10
45
25
16
7
15
20
MAX.
180
90
70
200
100
80
60
30
20
90
50
32
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
TYPICAL EXTRAPOLATION
FORMULA
78 ns
+
(0,25 ns/pF) C
L
40 ns
+
(0,10 ns/pF) C
L
32 ns
+
(0,07 ns/pF) C
L
76 ns
+
(0,48 ns/pF) C
L
40 ns
+
(0,20 ns/pF) C
L
33 ns
+
(0,15 ns/pF) C
L
10 ns
+
(0,40 ns/pF) C
L
6 ns
+
(0,18 ns/pF) C
L
4 ns
+
(0,13 ns/pF) C
L
10 ns
+
(0,70 ns/pF) C
L
9 ns
+
(0,33 ns/pF) C
L
5 ns
+
(0,23 ns/pF) C
L
January 1995
6
PHILIPS [ NXP SEMICONDUCTORS ]
