Philips Semiconductors
Product specification
Triple 2-channel analogue
multiplexer/demultiplexer
PINNING
Y
0A
to Y
0C
Y
1A
to Y
1C
S
A
to S
C
E
Z
A
to Z
C
FUNCTION TABLE
Fig.2 Pinning diagram.
E
L
HEF4053BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4053BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4053BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Notes
L
H
INPUTS
S
n
L
H
X
HEF4053B
MSI
independent inputs/outputs
independent inputs/outputs
select inputs
enable input (active LOW)
common inputs/outputs
CHANNEL
ON
Y
0n
−Z
n
Y
1n
−Z
n
none
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
Fig.3 Schematic diagram (one switch).
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Supply voltage (with reference to V
DD
)
Note
1. To avoid drawing V
DD
current out of terminal Z, when switch current flows into terminals Y, the voltage drop across
the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no V
DD
current will flow out
of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may
not exceed V
DD
or V
EE
.
January 1995
3
V
EE
−18
to
+
0,5 V
PHILIPS [ NXP SEMICONDUCTORS ]
