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HEF4051BTS,118 参数 Datasheet PDF下载

HEF4051BTS,118图片预览
型号: HEF4051BTS,118
PDF下载: 下载PDF文件 查看货源
内容描述: [HEF4051B - 8-channel analog multiplexer/demultiplexer SSOP1 16-Pin]
分类和应用: 光电二极管
文件页数/大小: 23 页 / 174 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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HEF4051B
8-channel analog multiplexer/demultiplexer
Rev. 10 — 17 November 2011
Product data sheet
1. General description
The HEF4051B is an 8-channel analog multiplexer/demultiplexer with three address
inputs (S1 to S3), an active LOW enable input (E), eight independent inputs/outputs
(Y0 to Y7) and a common input/output (Z). The device contains eight bidirectional analog
switches, each with one side connected to an independent input/output (Y0 to Y7) and the
other side connected to a common input/output (Z). With E LOW, one of the eight
switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches
are in the high-impedance OFF-state, independent of S1 to S3. If break before make is
needed, then it is necessary to use the enable input.
V
DD
and V
SS
are the supply voltage connections for the digital control inputs (S1 to S3,
and E). The V
DD
to V
SS
range is 3 V to 15 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between V
DD
as a positive limit and V
EE
as a negative limit. V
DD
V
EE
may not
exceed 15 V. Unused inputs must be connected to V
DD
, V
SS
, or another input. For
operation as a digital multiplexer/demultiplexer, V
EE
is connected to V
SS
(typically
ground). V
EE
and V
SS
are the supply voltage connections for the switches.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from
40 C
to +85
C
and
40 C
to +125
C
Complies with JEDEC standard JESD 13-B
3. Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating