Philips Semiconductors
Product specification
Quadruple 2-input NAND gate
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C;
C
L
= 50 pF; input transition times
≤
20 ns
V
DD
V
Propagation delays
I
n
→
O
n
Output transition times
HIGH to LOW
5
10
15
5
10
15
5
LOW to HIGH
10
15
t
TLH
t
THL
t
PHL
; t
PLH
SYMBOL
TYP
55
25
20
60
30
20
60
30
20
MAX
110
45
35
120
60
40
120
60
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
HEF4011B
gates
TYPICAL EXTRAPOLATION
FORMULA
28 ns
+
(0,55 ns/pF) C
L
14 ns
+
(0,23 ns/pF) C
L
12 ns
+
(0,16 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
V
DD
V
Dynamic power
dissipation per
package (P)
5
10
15
TYPICAL FORMULA FOR P (µW)
1300 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
6000 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
20 100 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
∑
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
January 1995
3