BSS84
NXP Semiconductors
P-channel enhancement mode vertical DMOS transistor
7. Characteristics
Table 7.
Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Static characteristics
Conditions
Min
Typ
Max Unit
V(BR)DSS
drain-source breakdown ID = −10 µA; VGS = 0 V
−50
-
-
V
voltage
VGS(th)
gate-source threshold
voltage
ID = −1 mA; VDS = VGS;
see Figure 8
Tj = 25 °C
−0.8
-
-
−2
V
V
Tj = −55 °C
-
−1.8
IDSS
drain leakage current
gate leakage current
VDS = −40 V; VGS = 0 V
Tj = 25 °C
-
-
−100 nA
VDS = −50 V; VGS = 0 V
Tj = 25 °C
-
-
-
-
-
-
−10
−60
100
100
10
µA
µA
nA
nA
Ω
Tj = 125 °C
-
IGSS
VGS = +20 V; VDS = 0 V
VGS = −20 V; VDS = 0 V
-
-
RDSon
drain-source on-state
resistance
VGS = −10 V;
ID = −130 mA;
see Figure 5 and 7
6
Dynamic characteristics
|Yfs|
transfer admittance
VDS = −25 V;
ID = −130 mA
50
-
-
mS
Ciss
Coss
Crss
input capacitance
output capacitance
VGS = 0 V; VDS = −25 V;
f = 1 MHz; see Figure 9
-
-
-
25
15
3.5
45
25
12
pF
pF
pF
reverse transfer
capacitance
ton
turn-on time
VDS = −40 V; VGS = 0 V
to −10 V; ID = −200 mA;
see Figure 10 and 11
-
-
3
7
-
-
ns
ns
toff
turn-off time
VDS = −40 V;
VGS = −10 V to 0 V;
ID = −200 mA;
see Figure 10 and 11
BSS84_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 16 December 2008
5 of 11
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