Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
CHARACTERISTICS
T
j
= 25
°C
unless otherwise specified.
SYMBOL
V
(BR)DSS
I
DSS
±I
GSS
V
GS(th)
R
DS(on)
Y
fs
C
iss
PARAMETER
drain-source breakdown voltage
drain-source leakage current
gate-source leakage current
gate-source threshold voltage
drain-source on-resistance
transfer admittance
input capacitance
CONDITIONS
I
D
= 10
µA
V
GS
= 0
V
DS
= 60 V
V
GS
= 0
±V
GS
= 20 V
V
DS
= 0
I
D
= 1 mA
V
GS
= V
DS
I
D
= 120 mA
V
GS
= 10 V
I
D
= 120 mA
V
DS
= 25 V
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
V
DS
= 25 V
V
GS
= 0
f = 1 MHz
MIN.
100
−
−
0.8
−
80
−
BSS123
TYP. MAX. UNIT
−
−
−
−
3
140
24
−
10
10
2.8
6
−
40
V
nA
nA
V
Ω
mS
pF
C
oss
output capacitance
−
15
25
pF
C
rss
feedback capacitance
−
4
10
pF
Switching times (see Figs
2
and
3)
t
on
turn-on time
I
D
= 200 mA
V
DD
= 50 V
V
GS
= 0 to 10 V
I
D
= 250 mA
V
DD
= 50 V
V
GS
= 0 to 10 V
−
4
10
ns
t
off
turn-off time
−
10
20
ns
April 1995
4
PHILIPS [ NXP SEMICONDUCTORS ]
