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74LVC374APW 参数 Datasheet PDF下载

74LVC374APW图片预览
型号: 74LVC374APW
PDF下载: 下载PDF文件 查看货源
内容描述: 八路D型触发器,5伏容限输入/输出;正边沿触发三态 [Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State]
分类和应用: 总线驱动器总线收发器触发器逻辑集成电路光电二极管
文件页数/大小: 12 页 / 104 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
Product specification
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
74LVC374A
AC WAVEFORMS
V
M
= 1.5V at V
CC
w
2.7V; V
M
= 0.5 V
CC
at V
CC
t
2.7V.
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
X
= V
OL
+ 0.3V at V
CC
w
2.7V; V
X
= V
OL
+ 0.1 V
CC
at V
CC
t
2.7V
V
Y
= V
OH
–0.3V at V
CC
w
2.7V; V
Y
= V
OH
– 0.1 V
CC
at V
CC
t
2.7V
1/f
max
V
I
CP INPUT
GND
V
I
nOE INPUT
GND
V
M
t
PLZ
V
M
t
w
t
PHL
V
M
V
M
V
CC
Q
n
OUTPUT
LOW-to-OFF
OFF-to-LOW
t
PLH
V
M
V
M
V
OH
V
X
V
OL
t
PHZ
t
PZL
V
M
V
OH
Qn OUTPUT
V
OL
t
PZH
SA00394
Q
n
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
V
Y
V
M
Waveform 1. Clock (CP) to output (Q
n
) propagation delays, the
clock pulse width, output transition times and the maximum
clock pulse frequency.
outputs
disabled
outputs
enabled
SW00207
V
I
CP
INPUT
GND
t
su
t
h
V
I
Dn
INPUT
t
su
t
h
V
I
D.U.T.
R
T
C
L
50pF
500Ω
V
CC
V
M
Waveform 3. 3-State enable and disable times.
TEST CIRCUIT
S
1
2 x V
CC
Open
GND
GND
V
OH
Qn
OUTPUT
V
OL
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
Waveform 2. Data setup and hold times for the D
n
input to the
CP input.
1998 Jul 29
ÉÉÉÉÉÉÉ ÉÉÉÉ
ÉÉ
ÉÉÉÉÉÉÉ ÉÉÉÉ
ÉÉ
ÉÉÉÉÉÉÉ ÉÉÉÉ
ÉÉ
V
M
V
M
PULSE
GENERATOR
V
O
500Ω
Test
V
CC
t
2.7V
2.7V – 3.6V
V
I
V
CC
2.7V
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S
1
Open
2 x V
CC
GND
SW00107
SY00003
Waveform 4. Load circuitry for switching times.
7