74LVC1G32
NXP Semiconductors
Single 2-input OR gate
6. Pinning information
6.1 Pinning
74LVC1G32
74LVC1G32
B
A
1
2
3
6
5
4
V
CC
74LVC1G32
1
2
3
5
4
B
A
V
Y
B
A
1
2
3
6
5
4
V
CC
CC
n.c.
Y
n.c.
Y
GND
GND
GND
001aab641
001aaf000
Transparent top view
Transparent top view
001aab640
Fig 4. Pin configuration SOT353-1
and SOT753
Fig 5. Pin configuration SOT886
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT353-1/SOT753
SOT886/SOT891
B
1
2
3
4
-
1
2
3
4
5
6
data input
A
data input
GND
Y
ground (0 V)
data output
not connected
supply voltage
n.c.
VCC
5
7. Functional description
Table 4.
Function table[1]
Input
Output
A
L
B
L
Y
L
L
H
L
H
H
H
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level
74LVC1G32_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 06 — 2 August 2007
3 of 14
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