74LVC1G32-Q100
NXP Semiconductors
Single 2-input OR gate
12. AC waveforms
V
I
V
A, B input
GND
M
t
t
PHL
PLH
V
OH
V
Y output
M
mna615
V
OL
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 5. The input A, B to output Y propagation delays
Table 9.
Measurement points
Supply voltage
VCC
Input
Output
VM
VM
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5 VCC
0.5 VCC
1.5 V
0.5 VCC
0.5 VCC
1.5 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
1.5 V
0.5 VCC
0.5 VCC
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance; should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 6. Test circuit for measuring switching times
74LVC1G32_Q100
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 1 — 7 August 2012
6 of 13
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