Philips Semiconductors
Product specification
Quad 2-input EXCLUSIVE-OR gate
74HC/HCT86
FEATURES
GENERAL DESCRIPTION
• Output capability: standard
• ICC category: SSI
The 74HC/HCT86 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT86 provide the EXCLUSIVE−OR function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
ns
HC
11
HCT
14
tPHL/ tPLH
CI
propagation delay nA, nB to nY
input capacitance
CL = 15 pF; VCC = 5 V
3.5
30
3.5
30
pF
pF
CPD
power dissipation capacitance per gate
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
NXP [ NXP ]
