74HC74; 74HCT74
NXP Semiconductors
Dual D-type flip-flop with set and reset; positive edge-trigger
V
I
V
M
nCP input
GND
t
rec
V
I
V
M
nSD input
nRD input
GND
t
t
W
W
V
I
V
M
GND
t
t
PHL
PLH
V
OH
nQ output
nQ output
V
V
M
V
OL
V
OH
M
V
OL
t
t
PLH
mna423
PHL
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Set and reset propogation delays, pulse widths and recovery time
Table 9.
Type
Measurement points
Input
VM
Output
VM
74HC74
0.5VCC
1.3 V
0.5VCC
1.3 V
74HCT74
74HC_HCT74
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 27 August 2012
11 of 21