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74HC4059N3 参数 Datasheet PDF下载

74HC4059N3图片预览
型号: 74HC4059N3
PDF下载: 下载PDF文件 查看货源
内容描述: [Prescaler, CMOS, PDIP24]
分类和应用: 光电二极管逻辑集成电路触发器
文件页数/大小: 20 页 / 125 K
品牌: PHILIPS [ PHILIPS SEMICONDUCTORS ]
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Philips Semiconductors  
Product specification  
Programmable divide-by-n counter  
74HC/HCT4059  
FUNCTION TABLE  
LATCH  
ENABLE  
INPUT  
MODE  
SELECT  
INPUTS  
FIRST COUNTING  
SECTION  
LAST COUNTING  
SECTION  
COUNTER  
RANGE  
DECADE 1  
DECADE 5  
OPERATION  
MAX  
JAM  
MAX.  
JAM  
DIVIDED  
BY  
BCD  
BINARY  
MAX.  
LE  
Ka Kb Kc MODE PRESET INPUTS  
STATE USED  
PRESET INPUTS  
MAX.  
STATE  
USED  
J2J3J4  
J3J4  
J4  
H
H
H
H
H
L
H
L
H
H
L
H
H
H
H
L
2
1
3
4
7
9
1
3
4
7
9
9
J1  
8
4
2
2
1
8
4
2
2
1
1
7
15 999 17 331  
15 999 18 663  
4
J1J2  
3
1
1
0
7
3
1
1
0
0
H
L
5
J1J2J3  
J1J2J3  
J1J2J3J4  
J1  
9 999 13 329 timer mode  
15 999 21 327  
L
8
J4  
H
H
L
H
H
H
L
10  
2
9 999 16 659  
H
H
H
H
L
J2J3J4  
J3J4  
J4  
15 999 17 331  
L
4
J1J2  
15 999 18 663  
L
H
L
5
J1J2J3  
J1J2J3  
J1J2J3J4  
J1J2J3J4  
9 999 13 329  
divide-by-n mode  
L
L
8
J4  
15 999 21 327  
9 999 16 659  
9 999 16 659  
L
H
L
H
H
10  
10  
H
L
fixed  
divide-by-10 000  
mode  
L
L
H
L
L
L
preset inhibited  
master preset  
preset inhibited  
master preset  
10 000  
master preset  
mode  
X
X
Note  
1. It is recommended that the device is in the master preset mode (Kb = Kc = logic 0) in order to correctly initialize the  
device prior to start-up. An example of a suitable external circuit is shown in Fig.14.  
H = HIGH voltage level  
L = LOW voltage level  
X = don’t care  
Table 1  
4
1
1
5
7
7
9
4
4
6
J1  
L
J2  
J3  
H
J4  
H
J5  
H
J6  
L
J7  
H
J8  
L
J9  
H
J10  
L
J11  
L
J12  
H
J13  
L
J14  
H
J15  
J16  
L
L
H
Table 2  
6
5
J1  
L
J2  
H
J3  
H
J4  
H
J5  
H
J6  
H
J7  
H
J8  
L
J9  
L
J10  
L
J11  
H
J12  
L
J13  
H
J14  
L
J15  
H
J16  
L
Table 3  
9
8
J1  
H
J2  
L
J3  
L
J4  
H
J5  
H
J6  
H
J7  
H
J8  
L
J9  
L
J10  
L
J11  
H
J12  
L
J13  
L
J14  
L
J15  
L
J16  
H
1998 Jul 08  
7
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