74HC30; 74HCT30
NXP Semiconductors
8-input NAND gate
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date
20121227
Data sheet status
Change notice
Supersedes
74HC_HCT30 v.6
Modifications:
Product data sheet
-
74HC_HCT30 v.5
• New general description.
74HC_HCT30 v.5
Modifications:
20111213
Product data sheet
-
74HC_HCT30 v.4
• Legal pages updated.
74HC_HCT30 v.4
74HC_HCT30 v.3
74HC_HCT30 v.2
20100504
20100420
19970829
Product data sheet
-
-
-
74HC_HCT30 v.3
Product data sheet
Product specification
74HC_HCT30 v.2
-
74HC_HCT30
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 6 — 27 December 2012
13 of 16
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