74HC273; 74HCT273
NXP Semiconductors
Octal D-type flip-flop with reset; positive-edge trigger
11. Waveforms
1/f
max
V
I
CP input
V
t
V
t
M
M
GND
t
t
W
W
PHL
PLH
V
OH
90%
V
Qn output
M
10%
V
OL
t
t
TLH
001aae062
THL
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Propagation delay clock input (CP) to output (Qn), clock (CP) pulse width, output transition time and the
maximum clock pulse frequency
V
I
V
MR input
M
GND
t
t
rec
W
V
I
CP input
V
M
GND
t
PHL
V
OH
V
Qn output
M
V
OL
mna464
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 8. Propagation delay master reset (MR) to output (Qn), pulse width master reset (MR) and recovery time
master reset (MR) to clock (CP)
74HC_HCT273
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© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 10 June 2013
10 of 21
NXP [ NXP ]
