NXP Semiconductors
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
11 12 13 14 3
4
5
6
D0 D1 D2 D3 D4 D5 D6 D7
1 PL
10 DS
2 CP
15 CE
8-BIT SHIFT REGISTER
PARALLEL-IN/SERIAL-OUT
Q7 9
Q7 7
mna992
Fig 3.
Functional diagram
6. Pinning information
6.1 Pinning
74HC165
74HCT165
PL
CP
D4
D5
D6
D7
Q7
GND
1
2
3
4
5
6
7
8
001aah564
74HC165
74HCT165
16 V
CC
15 CE
CP
14 D3
13 D2
12 D1
11 D0
10 DS
9
Q7
D4
D5
D6
D7
Q7
2
3
4
5
6
7
8
GND
Q7
9
GND
(1)
terminal 1
index area
16 V
CC
15 CE
14 D3
13 D2
12 D1
11 D0
10 DS
PL
1
001aah565
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Fig 4.
Pin configuration (DIP16, SO16
and (T)SSOP16)
Fig 5.
Pin configuration (DHVQFN16)
74HC_HCT165_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 14 March 2008
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