Philips Semiconductors
Product specification
Dual JK flip-flop with reset; negative-edge trigger
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I
CC
category: flip-flops
Note to HCT types
74HC/HCT107
The value of additional quiescent supply current (∆I
CC
) for a unit load of 1 is given in the family specifications.
To determine
∆I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
nK
nR
nCP, nJ
UNIT LOAD COEFFICIENT
0.60
0.65
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
f
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HCT
SYMBOL PARAMETER
min.
t
PHL
/ t
PLH
t
PHL
/ t
PLH
t
PHL
/ t
PLH
t
THL
/ t
TLH
t
W
t
W
t
rem
t
su
t
h
f
max
propagation delay
nCP to nQ
propagation delay
nCP to nQ
propagation delay
nR to nQ, nQ
output transition time
clock pulse width
HIGH or LOW
reset pulse width
LOW
removal time
nR to nCP
set-up time
nJ, nK to nCP
hold time
nJ, nK to nCP
maximum clock pulse
frequency
16
20
14
20
5
30
+25
typ.
19
21
20
7
9
11
8
7
−2
66
−40
to
+85
−40
to
+125
UNIT
V
CC
WAVEFORMS
(V)
TEST CONDITIONS
max. min. max. min. max.
36
36
38
15
20
25
18
25
5
24
45
45
48
19
24
30
21
30
5
20
54
54
57
22
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
Fig.6
Fig.6
Fig.7
Fig.6
Fig.6
Fig.7
Fig.7
Fig.6
Fig.6
Fig.6
December 1990
6